PR#6588 part 1: wrong "parallel move" code generated for CSE of operators
that have multiple results.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@15530 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Follow-up to commit 15012: keeping checkbound equations is useless when load equations have been forgotten, as all checkbounds involve a load of a block header. So, simplify things further by emptying the numbering after calls and allocs.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@15022 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
PR#6484 and PR#6486: CSE across memory allocations can present the GC with memory roots that are illegal.
Plus: lift the previous restriction that all arithmetic ops and loads have at most one result register, this isn't true for ARM with soft floats.
Plus: code refactoring and more comments.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@15013 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
the x87 FP stack, which must not be eliminated.
CSEgen: harden against the same x87-specific issue + against reuse of
values in fixed hardware registers that were destroyed by a prior
operation.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@14877 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
(Reuses results of previous computations instead of recomputing them.)
(Cherry-picked from branch backend-optim.)
Tested on amd64/linux and i386/linux.
Other back-ends compile (after assorted updates) but are untested.
git-svn-id: http://caml.inria.fr/svn/ocaml/trunk@14688 f963ae5c-01c2-4b8c-9fe0-0dff7051ff02
Xavier Leroy