Add X86_dsl.r13

master
Mark Shinwell 2016-06-20 11:19:17 +01:00
parent 3e02056ae7
commit c992adb232
2 changed files with 2 additions and 0 deletions

View File

@ -50,6 +50,7 @@ let ax = Reg16 RAX
let rax = Reg64 RAX
let r10 = Reg64 R10
let r11 = Reg64 R11
let r13 = Reg64 R13
let r14 = Reg64 R14
let r15 = Reg64 R15
let rsp = Reg64 RSP

View File

@ -39,6 +39,7 @@ val ax: arg
val rax: arg
val r10: arg
val r11: arg
val r13: arg
val r14: arg
val r15: arg
val rsp: arg