From e0ef859c7fd77215a4cde375fc96ab37731e97e1 Mon Sep 17 00:00:00 2001
From: Colomban Wendling <ban@herbesfolles.org>
Date: Fri, 19 Jul 2013 17:09:57 +0200
Subject: [PATCH] Verilog: Fix parsing initializers

Import upstream CTags fix for parsing Verilog initalizers
(fixes parsing of test bug2747828.v).
---
 tagmanager/ctags/verilog.c    | 1 +
 tests/ctags/bug2747828.v.tags | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/tagmanager/ctags/verilog.c b/tagmanager/ctags/verilog.c
index e836852c..49898890 100644
--- a/tagmanager/ctags/verilog.c
+++ b/tagmanager/ctags/verilog.c
@@ -229,6 +229,7 @@ static void tagNameList (const verilogKind kind, int c)
 		c = skipWhite (c);
 		if (c == '=')
 		{
+			c = skipWhite (vGetc ());
 			if (c == '{')
 				skipPastMatch ("{}");
 			else
diff --git a/tests/ctags/bug2747828.v.tags b/tests/ctags/bug2747828.v.tags
index b9edadaf..711db507 100644
--- a/tests/ctags/bug2747828.v.tags
+++ b/tests/ctags/bug2747828.v.tags
@@ -1,3 +1,2 @@
 # format=tagmanager
-9Ì16384Ö0
 ramaddr_0Ì16384Ö0