diff --git a/sys/src/9/cycv/dat.h b/sys/src/9/cycv/dat.h index ce4417856..81639681d 100644 --- a/sys/src/9/cycv/dat.h +++ b/sys/src/9/cycv/dat.h @@ -203,6 +203,7 @@ struct DevConf #define mpcore ((ulong*)MPCORE_BASE) #define resetmgr ((ulong*)RESETMGR_BASE) #define sysmgr ((ulong*)SYSMGR_BASE) +#define l3 ((ulong*)L3_BASE) /*dmacopy*/ #define SRC_INC (1<<0) diff --git a/sys/src/9/cycv/devarch.c b/sys/src/9/cycv/devarch.c index 32b832d64..28da957bb 100644 --- a/sys/src/9/cycv/devarch.c +++ b/sys/src/9/cycv/devarch.c @@ -9,6 +9,8 @@ #define fpga ((ulong*) FPGAMGR_BASE) +enum { REMAP = 0x0 / 4 }; + enum { Timeout = 3000 }; enum { @@ -56,6 +58,8 @@ static Dirtab archdir[Qmax] = { }; static int narchdir = Qbase; +static Physseg *axi; + static Ref fpgawopen; enum { FPGABUFSIZ = 65536 }; static uchar *fpgabuf; @@ -119,7 +123,11 @@ fpgaconf(void) [10] {1, 4, COMP|AESMAYBE|PORFAST|FPP32}, [14] {1, 4, COMP|AESMAYBE|FPP32} }; - + + axi->attr |= SG_FAULT; + procflushpseg(axi); + flushmmu(); + if((fpga[FPGAPINS] & FPGA_POWER_ON) == 0) error("FPGA powered off"); msel = fpga[FPGASTAT] >> 3 & 0x1f; @@ -187,6 +195,10 @@ fpgafinish(void) return; } fpga[FPGACTRL] &= ~HPSCONFIG; + + axi->attr &= ~SG_FAULT; + procflushpseg(axi); + flushmmu(); } static long @@ -256,13 +268,26 @@ archclose(Chan* c) } } -static void -archreset(void) +void +archinit(void) { + Physseg seg; + fpga[FPGAINTEN] = 0; fpga[FPGAEOI] = -1; fpga[FPGAINTTYPE] = -1; intrenable(FPGAMGRIRQ, fpgairq, nil, LEVEL, "fpgamgr"); + + resetmgr[BRGMODRST] &= ~7; + l3[REMAP] = 0x18; + + memset(&seg, 0, sizeof seg); + seg.attr = SG_PHYSICAL | SG_DEVICE | SG_NOEXEC | SG_FAULT; + seg.name = "axi"; + seg.pa = 0xFF200000; + seg.size = 0x200000; + axi = addphysseg(&seg); + } static Chan* @@ -275,7 +300,7 @@ Dev archdevtab = { 'P', "arch", - archreset, + devreset, devinit, devshutdown, archattach, diff --git a/sys/src/9/cycv/io.h b/sys/src/9/cycv/io.h index 318fca8c8..b7ad43f38 100644 --- a/sys/src/9/cycv/io.h +++ b/sys/src/9/cycv/io.h @@ -9,9 +9,11 @@ #define FPGAMGRDATA 0xFFB90000 #define OCRAM 0xFFFF0000 #define DMAS_BASE 0xFFE01000 +#define L3_BASE 0xFF800000 /*RESETMGR*/ #define PERMODRST (0x14/4) +#define BRGMODRST (0x1C/4) /*SYSMGR*/ #define FPGA_MODULE (0x28/4) diff --git a/sys/src/9/cycv/main.c b/sys/src/9/cycv/main.c index 48212fce4..3c18148cb 100644 --- a/sys/src/9/cycv/main.c +++ b/sys/src/9/cycv/main.c @@ -302,6 +302,7 @@ main(void) bootlinks(); else links(); + archinit(); chandevreset(); pageinit(); userinit();